Computer architecture and implementation

In this textbook Harvey Cragon provides a clear introduction to computer architecture and implementation. He interweaves two important themes throughout: the major concepts and design philosophies of computer architecture and organization, and analytic modeling of computer performance. The author begins by describing the classic von Neumann architecture, and then details a number of performance models and evaluation techniques. He goes on to cover user instruction set design--including RISC architecture, pipelined processors, input/output techniques, queuing modes, and extended instruction set architectures. A unique feature of the book is its memory-centric approach--memory systems are discussed before processor implementations. Each topic is illustrated with reference to actual IBM and Intel architectures. The book contains many worked examples, 259 illustrations, and over 130 homework exercises. It is an ideal textbook for a one-semester undergraduate course in computer architecture and implementation
''This textbook provides a clear and concise introduction to computer architecture and implementation. Two important themes are interwoven throughout the book. The first is an overview of the major concepts and design philosophies of computer architecture and organization. The second is the early introduction and use of analytic modeling of computer performance.''.''The author begins by describing the classic von Neumann architecture and then presents in detail a number of performance models and evaluation techniques. He goes on to cover user instruction set design, including RISC architecture. A unique feature of the book is its memory-centric approach - memory systems are discussed before processor implementations. The author also deals with pipelined processors, input/output techniques, queuing modes, and extended instruction set architectures. Each topic is illustrated with reference to actual IBM and Intel architectures.''--BOOK JACKET.  Read more... Computer overview -- Performance models and evaluation -- User instruction set design -- Memory systmes -- Processor control design -- Pipelined processors -- Input/output -- Extended instruction set architectures